Homebrew SDR

[VK2DDS]

Hi All,

For the last ~8 months I've been working on a wideband SDR receiver as part of my electrical engineering studies and thought that a few people might find it interesting.

So far I've got the main receiver board working, it contains a AD9912 DDS local oscillator which is good to about 450MHz. This clocks a quadrature sampling detector (aka Tayloe Detector) which can do direct down conversion to DC up to about 112MHz. For reception above this I'm designing a simple SA602 mixer board with an image rejection filter optmised for 2m, reception up to about 500MHz is possible but an image rejection filter would need to be built for a selected band.

More information can be found on my homepage, the full thesis is here: http://www.vk2mev.net/?p=175

The design that I documented has had several changes to it, so don't build the design in the thesis and expect it to work! The main issues were removing AM demodulation interference from the RF amp (HPF'ing the output) and modifying the QSD amplifier topology because the design presented in Tayloe's paper has major phase imbalance issues and image rejection is almost non-existent.

Enough talk, have some demo videos:

[VK4HJ]

Thanks for your post Brenton,
I enjoyed reading your paper.
I have been playing with SDR for the last 3 years
and have found it really exciting.
I have used a flex 3000 for the last 2 years with great results.
Converted my IC7400 to a SDR IF and last week moved on to
a QS1R DDC rx/tx
SDR is definitely the way it is going to go.DDC being the cutting edge,
resolves the image issues and alias responses.
once again, tnx your paper.
Chris VK4HJ

[VK2DDS]

Thanks for your interest Chris.

The paper has a lot of flaws (it was written in a rush), mainly in the QSD design, but given that it's 50 pages/12 000 words it would seem a waste if the only people to read it were the two academics marking it! What's that research mantra? Never trust a single source!

My main focus now is in the hardware, it's to be demonstrated on Nov 20th. The VHF/UHF down-mixer board should be milled in the next few days, that's the next big step. After that I'll just make it more user friends (currently the AVR needs to be re-flashed to set the frequency :p).

Cheers,
Brenton

[VK1DJA]

Congratulatiojns, Brenton. A very creditable piece of design. In amateur circles, I hope it gets the recognition it deserved for extending Tayloe QSD above the 21 MHZ or so that has been taken as a limit. And that the examiners like it too.

I'd like to hear more about the devices you've used in the QSD (can't track them down with Google) and any performance assessments. But perhaps after you've finished the end-of-year academic stuff.

Good luck with it all.

Cheers

Dave

[VK2DDS]

Hi Dave,

Here are the devices in the QSD:

Local Oscillator: AD9912 (using HSTL output for clocking, 1GHz DDS core, up to 450MHz output)
ECL to LVTTL converters: SN65EPT23 Good to 300MHz full output swing, tested to 450MHz, used for driving the sampling switches and converting HSTL to single ended clock for D F/F's.
D Flip Flops: MC10EP31DG Rated to ">3GHz" clock, ECL, requires transmission line PCB design, terminating resistors etc. 60-200pS rise/fall time!
Sampling Switches: NC7SZ66 Lowest Ton/Toff I could find, 1.8-3nS
Op-Amp: LT6231 Lowest noise available, 1.1nV/rt(Hz)

Everything is about as expensive as I could find through Element 14, the uni was paying for it .

2m reception demo video posted above. It uses a down-mixer stage, 29MHz IF. The DDS chip is used for both QSD clocking and the mixer local oscillator.

[VK5TX]

P